The present invention relates to an improvement in a voltage level detection circuit which senses whether a power source voltage drops below a given voltage level.
A typical prior art voltage level detection circuit as shown in FIG. 1 is well known. In the drawing T.sub.1 through T.sub.4 designate MOS transistors, R.sub.1 and R.sub.2 designate resistors, P designates a P-channel type MOS transistor, and N designates an N-channel type MOS transistor. T.sub.2 and T.sub.4 form an inverter circuit. In addition, E.sub.1 represents a power source voltage such as a battery with the cathode connected with a utility circuit and the anode grounded, and E.sub.2 and E.sub.3 represents potentials at respective nodes.
When the power voltage E.sub.1 is increased above the threshold voltage VH.sub.3 of the MOS transistor T.sub.3, the transistor T.sub.3 is turned ON and E.sub.2 is increased to the ground potential. This means that the transistor T.sub.1 is turned ON too and the drain potential E.sub.3 of T.sub.1 is equal to the power source voltage E.sub.1 . In other words, the illustrated circuit compares the power source voltage E.sub.1 with the threshold voltage of the P channel or N channel MOS transistor and then detects a drop in the power source voltage. FIGS. 4(a) and 4(b) are voltage characteristic charts showing a relationship between the voltages E.sub.1 and E.sub.2. However, design of such a circuit arrangement is relatively difficult because the MOS transistor should be driven in a normal mode up to near the threshold voltage level. Therefore, the resistor R.sub.1 is smaller and the decision level E.sub.1 is higher in practical use as depicted by the broken line in FIGS. 4(a) and 4(b ). This approach, however, results in increase of current flowing through the resistor R.sub.1 and the transistor T.sub.3 and in other words, increase of consumption current. The battery is often renewed.
Accordingly, it is an object of the present invention to provide a voltage level detection circuit with less power consumption.
In accordance with the voltage level detection circuit of the present invention, a power source voltage is compared with reference to the threshold voltage of an MOS transistor and the results of such comparison are developed as voltage level detection outputs. The level detection circuit is comprised of a first MOS transistor having the gate and the drain connected together with a power source voltage V.sub.DD (E.sub.1) via a resistor and the source grounded and a second MOS transistor having the gate connected with the drain of the first MOS transistor and the drain grounded via a resistor.